Demand for image sensors has increased as both consumer and commercial products utilize image sensors in an increased range of devices. Buyers desire image sensors with faster performance and higher quality imaging capabilities. To produce image sensors that meet these demands, multi-wafer image sensors have been developed.
Conventional processes to connect one wafer of an image sensor to another include forming a trench/cavity in silicon, lining the trench/cavity with an insulator, and filling the lined trench with copper. However, forming the trench in silicon requires patterning that reduces process margin and limits design rules. Additionally, lining the trench with an insulator fills the trench with material that reduces the area available for a conductive material for electrical connection. This increases the amount of real estate required for each electrical connection between wafers and may also increase the number of vias required to carry certain electrical signals. Therefore, a method of fabricating a multi-wafer image sensor that increased connectivity density between wafers and reduced onerous process steps would be desirable.